DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 282

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 7 DMA Controller (Not Supported in the H8S/2321)
7.4
7.4.1
The DMAC can activate the DTC with a transfer end interrupt, rewrite the channel on which the
transfer ended using a DTC chain transfer, and reactivate the DTC. DMAWER applies restrictions
so that specific bits of DMACR for the specific channel, and also DMATCR and DMABCR, can
be changed to prevent inadvertent rewriting of registers other than those for the channel
concerned. The restrictions applied by DMAWER are valid for the DTC.
Figure 7.2 shows the transfer areas for activating the DTC with a channel 0A transfer end
interrupt, and reactivating channel 0A. The address register and count register area is re-set by the
first DTC transfer, then the control register area is re-set by the second DTC chain transfer.
When re-setting the control register area, perform masking by setting bits in DMAWER to prevent
modification of the contents of the other channels.
Rev.6.00 Sep. 27, 2007 Page 250 of 1268
REJ09B0220-0600
Figure 7.2 Areas for Register Re-Setting by DTC (Example: Channel 0A)
Register Descriptions (3)
DMA Write Enable Register (DMAWER)
DTC
Second transfer area
using chain transfer
First transfer area
DMACR0A
DMACR1A
DMAWER
DMABCR
ETCR0A
ETCR0B
ETCR1A
ETCR1B
IOAR0A
IOAR0B
IOAR1A
IOAR1B
MAR0A
MAR0B
MAR1A
MAR1B
DMACR0B
DMACR1B
DMATCR