DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 647

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.2.8
BRR is an 8-bit register that sets the serial transfer bit rate in accordance with the baud rate
generator operating clock selected by bits CKS1 and CKS0 in SMR.
BRR can be read or written to by the CPU at all times.
BRR is initialized to H'FF by a reset and in hardware standby mode. In software standby mode
and module stop mode it retains its previous state.
As baud rate generator control is performed independently for each channel, different values can
be set for each channel.
Table 14.3 shows sample BRR settings in asynchronous mode, and table 14.4 shows sample BRR
settings in synchronous mode.
Table 14.3 BRR Settings for Various Bit Rates (Asynchronous Mode)
Bit Rate
(bits/s)
110
150
300
600
1200
2400
4800
9600
19200
31250
38400
Bit
Initial value :
R/W
Bit Rate Register (BRR)
:
:
n
1
1
0
0
0
0
0
0
0
0
0
R/W
φ = 2 MHz
7
1
N
141
103
207
103
51
25
12
6
2
1
1
Error
(%)
0.03
0.16
0.16
0.16
0.16
0.16
0.16
0.00
R/W
6
1
n
1
1
0
0
0
0
0
0
0
0
0
φ = 2.097152 MHz
R/W
5
1
N
148
108
217
108
54
26
13
6
2
1
1
Section 14 Serial Communication Interface (SCI)
Error
(%)
–0.04 1
0.21
0.21
0.21
–0.70 0
1.14
–2.48 0
–2.48 0
R/W
4
1
Rev.6.00 Sep. 27, 2007 Page 615 of 1268
n
1
0
0
0
0
0
0
φ = 2.4576 MHz
R/W
3
1
N
174
127
255
127
63
31
15
7
3
1
1
Error
(%)
–0.26 1
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
R/W
2
1
n
1
1
0
0
0
0
0
0
0
REJ09B0220-0600
R/W
1
1
φ = 3 MHz
N
212
155
77
155
77
38
19
9
4
2
Error
(%)
0.03
0.16
0.16
0.16
0.16
0.16
–2.34
–2.34
–2.34
0.00
R/W
0
1

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