DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 769

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.2.2
Enabling or disabling of part of the on-chip ROM area in the chip can be selected by means of the
EAE bit in BCRL. For details of the other bits in BCRL, see section 6.2.5, Bus Control Register L
(BCRL).
Bit 5—External Address Enable (EAE): Selects whether addresses H'010000 to H'03FFFF *
to be internal addresses or external addresses.
Bit 5
0
1
Notes: 1. Do not access a reserved area.
19.3
The on-chip ROM is connected to the CPU by a 16-bit data bus, and both byte and word data can
be accessed in one state. Even addresses are connected to the upper 8 bits, and odd addresses to
the lower 8 bits. Word data must start at an even address.
The on-chip ROM is enabled and disabled by setting the mode pins (MD2 to MD0) and the EAE
bit in BCRL. These settings are shown in tables 19.2 and 19.3.
Bit
Initial value :
R/W
2. Addresses H'010000 to H'05FFFF in the H8S/2329B.
3. H8S/2328B in flash memory version.
Bus Control Register L (BCRL)
Operation
H8S/2329B, H8S/2328 *
H8S/2326
On-chip ROM
Addresses H'010000 to H'03FFFF *
or reserved area *
Addresses H'010000 to H'07FFFF in the H8S/2326.
:
:
BRLE
R/W
7
0
BREQOE
1
R/W
in single-chip mode
6
0
3
,
EAE
R/W
H8S/2327
Addresses H'010000 to
H'01FFFF are on-chip
ROM or address H'020000
to H'03FFFF are reserved
area *
5
1
1
2
are external addresses in external expanded mode
Description
R/W
4
1
Rev.6.00 Sep. 27, 2007 Page 737 of 1268
DDS
R/W
3
1
H8S/2323
Reserved area *
R/W
2
1
REJ09B0220-0600
WDBE
Section 19 ROM
(Initial value)
R/W
1
0
1
WAITE
R/W
0
0
2
are

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