DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 580

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 11 Programmable Pulse Generator (PPG)
Example of Normal Pulse Output (Example of Five-Phase Pulse Output): Figure 11.5 shows
an example in which pulse output is used for cyclic five-phase pulse output.
[1] Set up the TPU channel to be used as the output trigger channel so that TGRA is an output
[2] Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
[3] The timer counter in the TPU channel starts. When compare match A occurs, the NDRH
[4] Five-phase overlapping pulse output (one or two phases active at a time) can be obtained
Note: * The DMAC is not supported in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 548 of 1268
REJ09B0220-0600
compare register and the counter will be cleared by compare match A. Set the trigger period in
TGRA and set the TGIEA bit in TIER to 1 to enable the compare match A (TGIA) interrupt.
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the
next output data (H'C0) in NDRH.
subsequently by writing H'40, H'60, H'20, H'30. H'10, H'18, H'08, H'88... at successive TGIA
interrupts. If the DTC or DMAC * is set for activation by this interrupt, pulse output can be
obtained without imposing a load on the CPU.
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
Figure 11.5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
30
10
10
18
18
08
08
88
88
80
80
C0
C0
40
Time