DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 330

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 7 DMA Controller (Not Supported in the H8S/2321)
Figure 7.34 shows an example of single address transfer using the write data buffer function. In
this example, the CPU program area is in on-chip memory.
When the write data buffer function is activated, the DMAC recognizes that the bus cycle
concerned has ended, and starts the next operation. Therefore, DREQ pin sampling is started one
state after the start of the DMA write cycle or single address transfer.
7.5.13
The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table
7.13 summarizes the priority order for DMAC channels.
Table 7.13 DMAC Channel Priority Order
Short Address Mode
Channel 0A
Channel 0B
Channel 1A
Channel 1B
Rev.6.00 Sep. 27, 2007 Page 298 of 1268
REJ09B0220-0600
Figure 7.34 Example of Single Address Transfer Using Write Data Buffer Function
Internal read signal
External address
Internal address
DMAC Multi-Channel Operation
DACK
RD
φ
DMA
read
Full Address Mode
Channel 0
Channel 1
DMA
single
CPU
read
DMA
single
Priority
High
Low
CPU
read