DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 768

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Section 19 ROM
19.1.2
The operating mode of the chip is controlled by the mode pins and the BCRL register. The ROM-
related registers are shown in table 19.1.
Table 19.1 ROM Registers
Register Name
Mode control register
Bus controller register
Note: * Lower 16 bits of the address.
19.2
19.2.1
Note: * Determined by pins MD2 to MD0.
MDCR is an 8-bit read-only register used to monitor the current operating mode of the chip.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD2 to MD0 (the current operating mode). Bits MDS2 to MDS0 correspond to pins MD2 to
MD0. MDS2 to MDS0 are read-only bits, and cannot be modified. The mode pin (MD2 to MD0)
input levels are latched into these bits when MDCR is read. These latches are canceled by a reset.
Rev.6.00 Sep. 27, 2007 Page 736 of 1268
REJ09B0220-0600
Bit
Initial value :
R/W
Register Configuration
Register Descriptions
Mode Control Register (MDCR)
:
:
—
—
7
1
—
—
6
0
Abbreviation
MDCR
BCRL
—
—
5
0
—
—
4
0
R/W
R/W
R/W
—
—
3
0
Initial Value
Undefined
Undefined
MDS2
— *
R
2
MDS1
— *
R
1
H'FF3B
Address *
H'FED5
MDS0
— *
R
0