DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 59

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

Type
System control
Interrupts
Address bus
Data bus
Bus control
Symbol
FWE *
EMLE *
NMI
IRQ
IRQ
A
A
D
D
CS
CS
AS
RD
HWR
LWR
23
0
15
0
7
0
to
7
0
to
to
to
1
2
TFP-120
72
72
74
28 to 25,
29 to 32,
89 to 92
28 to 25,
23 to 16,
14 to 7,
5 to 2
51 to 48,
46 to 39,
37 to 34
29, 30,
61, 60,
117 to 120
82
83
84
85
Pin No.
FP-128B I/O
80
80
82
32 to 29,
33, 34,
37, 38, 97,
98, 101,
102
32 to 29,
27 to 20,
18 to 11,
9 to 6
57 to 54,
52 to 45,
43 to 40
33, 34,
69, 66,
127, 128,
1, 2
90
91
92
93
Input
Input
Input
Input
Output Address bus: These pins output an
I/O
Output Chip select: Signals for selecting
Output Address strobe: When this pin is
Output Read: When this pin is low, it
Output High write/write enable: A strobe
Output Low write: A strobe signal that
Rev.6.00 Sep. 27, 2007 Page 27 of 1268
Name and Function
Flash write enable: Enables/
disables flash memory programming.
Emulator enable: For connection to
the power supply (0 V)
Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
Interrupt request 7 to 0: These pins
request a maskable interrupt.
address.
Data bus: These pins constitute a
bidirectional data bus.
areas 7 to 0.
low, it indicates that address output
on the address bus is enabled.
indicates that the external address
space can be read.
signal that writes to external space
and indicates that the upper half (D
to D
The 2-CAS type DRAM write enable
signal.
writes to external space and
indicates that the lower half (D
of the data bus is enabled.
8
) of the data bus is enabled.
Section 1 Overview
REJ09B0220-0600
7
to D
15
0
)