DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 724

IC H8S MCU FLASH 256K 128QFP

DF2328BVF25V

Manufacturer Part Number
DF2328BVF25V
Description
IC H8S MCU FLASH 256K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2328BVF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2328BVF25V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2328BVF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 15 Smart Card Interface
Interrupt Operation (Except Block Transfer Mode): There are three interrupt sources in smart
card interface mode: transmit-data-empty interrupt (TXI) requests, transmit/receive-error interrupt
(ERI) requests, and receive-data-full interrupt (RXI) requests. The transmit-end interrupt (TEI)
request is not used in this mode.
When the TEND flag in SSR is set to 1, a TXI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated.
When any of flags ORER, PER, and ERS in SSR is set to 1, an ERI interrupt request is generated.
The relationship between the operating states and interrupt sources is shown in table 15.8.
Note: For details of operation in block transfer mode, see section 14.4, SCI Interrupts.
Table 15.8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit
Mode
Receive
Mode
Note: * The DMAC is not supported in the H8S/2321.
Rev.6.00 Sep. 27, 2007 Page 692 of 1268
REJ09B0220-0600
SCK
Normal
operation
Error
Normal
operation
Error
Figure 15.8 Timing for Fixing Clock Output
Flag
TEND
ERS
RDRF
PER, ORER
Specified pulse width
SCR write
(CKE0 = 0)
Enable Bit
TIE
RIE
RIE
RIE
SCR write
(CKE0 = 1)
Interrupt
Source
TXI
ERI
RXI
ERI
Specified pulse width
DTC
Activation
Possible
Not possible Not possible
Possible
Not possible Not possible
DMAC *
Activation
Possible
Possible

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