DF2328BVF25V Renesas Electronics America, DF2328BVF25V Datasheet - Page 427

• Manufacturer Part Number: DF2328BVF25V
• Description: IC H8S MCU FLASH 256K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2328BVF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: HD64F2328BVF25V

9.8.2
Table 9.13 shows the port A register configuration.
Table 9.13 Port A Registers
Name
Port A data direction register
Port A data register
Port A register
Port A MOS pull-up control register
Port A open drain control register
Port function control register 1
System control register
Note: * Lower 16 bits of the address.
Port A Data Direction Register (PADDR)
PADDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port A. PADDR cannot be read; if it is, an undefined value will be read.
PADDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode. The OPE bit in SBYCR is used to select whether the address output pins
retain their output state or become high-impedance when a transition is made to software standby
mode.
Bit
Initial value :
R/W
Register Configuration
:
:
PA7DDR PA6DDR PA5DDR PA4DDR PA3DDR PA2DDR PA1DDR PA0DDR
W
7
0
W
6
0
Abbreviation
PADDR
PADR
PORTA
PAPCR
PAODR
PFCR1
SYSCR
W
5
0
W
4
0
Rev.6.00 Sep. 27, 2007 Page 395 of 1268
R/W
W
R/W
R
R/W
R/W
R/W
R/W
W
3
0
H'00
Initial Value
H'00
Undefined
H'00
H'00
H'0F
H'01
W
2
0
Section 9 I/O Ports
REJ09B0220-0600
W
1
0
Address *
H'FEB9
H'FF69
H'FF59
H'FF70
H'FF77
H'FF45
H'FF39
W
0
0