HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 206

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2. Timer counter C (TCC)
TCC is an 8-bit read-only up-counter, which is incremented by internal clock or external event
input. The clock source for input to this counter is selected by bits TMC2 to TMC0 in timer mode
register C (TMC). TCC values can be read by the CPU at any time.
When TCC overflows from H'FF to H'00 or to the value set in TLC, or underflows from H'00 to
H'FF or to the value set in TLC, the IRRTC bit in IRR2 is set to 1.
TCC is allocated to the same address as TLC.
Upon reset, TCC is initialized to H'00.
3. Timer load register C (TLC)
TLC is an 8-bit write-only register for setting the reload value of timer counter C (TCC).
When a reload value is set in TLC, the same value is loaded into timer counter C as well, and TCC
starts counting up from that value. When TCC overflows or underflows during operation in auto-
reload mode, the TLC value is loaded into TCC. Accordingly, overflow/underflow periods can be
set within the range of 1 to 256 input clocks.
The same address is allocated to TLC as to TCC.
Upon reset, TLC is initialized to H'00.
4. Clock stop register 1 (CKSTPR1)
Bit
Initial value
Read/Write
192
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
S1CKSTP S31CKSTP S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
R/W
TCC7
TLC7
7
1
W
R
7
0
7
0
R/W
TCC6
TLC6
6
1
W
R
6
0
6
0
R/W
TCC5
TLC5
5
1
W
R
5
0
5
0
TCC4
TLC4
R/W
W
4
1
R
4
0
4
0
TCC3
TLC3
R/W
W
R
3
0
3
0
3
1
TCC2
TLC2
R/W
W
R
2
0
2
0
2
1
TCC1
TLC1
W
R/W
R
1
0
1
0
1
1
TCC0
TLC0
W
R
0
0
0
0
R/W
0
1