HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 391

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Some examples of how these settings will be used in the FLEX decoder are shown in figure 12-12.
LINE SETTING
6. Low Battery Detection
The FLEX decoder can be configured to poll the LOBAT input pin at the end of every receiver
control setting. This check can be enabled or disabled for each receiver control setting. If the poll
is enabled for a setting, the pin will be read just before the FLEX decoder changes the receiver
control lines from that setting to another setting. The FLEX decoder will send a Status Packet
whenever the value on two consecutive reads of the LOBAT pin yields different results.
12.5.2
A simple message consists of an Address Packet followed by a Vector Packet indicating the word
numbers of associated Message Packets.The tables below show a more complex example of
receiving three Messages and two Block Information Word Packets in the first two blocks of a 2
phase 3200 bps, FLEX frame. Note that the messages shown may be portions of fragmented or
group messages. Note further that in the case of a 6400 bps FLEX signal, there would be four
phases: A, B, C and D, and in the case of a 1600 bps signal there would be only a single phase A.
Table 12-30 shows the block number, word number (WN) and word content of both phases A and
C. Note contents of words not meant to be received by the host are left blank. Each phase begins
with a block information word (WN 0), this is not sent to the host. The first message is in phase A
and has an address (WN 3), vector (WN 7) and three message words (WN9 - 11). The second
message is also in phase A and has an address (WN 4), a vector (WN 8) and four message words
LINE SETTING
FLEX SIGNAL
EXAMPLE #2
EXAMPLE #1
RECEIVER
RECEIVER
CONTROL
CONTROL
3200sps Data Setting:This setting is applied after the FLEX decoder has found the C or C
sync word in a 3200 symbols per second frame.
Message Building
1600 sps Data or 3200 sps Data
1600 sps Data or 3200 sps Data
or Last Used Warm Up Setting
or Last Used Warm Up Setting
Figure 12-12 Examples of Receiver Control Transitions
Block 10
Possible
Possible
LOBAT
LOBAT
Check
Check
1600 sps Sync Setting
Sync 1
1600sps Sync Setting
Possible
Frame
LOBAT
Check
Info
Sync Setting
3200sps
Sync 2
Possible
Possible
LOBAT
LOBAT
Check
Check
1600 sps Data Setting
3200sps Data
Block 0
Setting
377