HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 367

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

ST: Step Time. This is the time the FLEX decoder is to wait before applying the next state’s
receiver control value to the receiver control lines. The setting is in steps of 625 s. Valid values
are 625 s (ST=01) to 79.375ms (ST=7F in hexadecimal). (value after reset=625 s)
3. 3200sps Sync Setting Packets
Table 12-13 3200sps Sync Setting Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
LBC: Low Battery Check. If this bit is set, the FLEX decoder will check the status of the LOBAT
port just before leaving this receiver state. (value after reset=0)
CLS: Control Line Setting. This is the value to be output on the receiver control lines (S0-S7) for
this receiver state. (value after reset=0)
ST: Step Time. This is the time the FLEX decoder is to wait before expecting good signals on the
EXTS1 and EXTS0 signals after warming up. The setting is in steps of 625 s. Valid values are
625 s (ST=01) to 79.375ms (ST=7F in hexadecimal). (value after reset=625 s)
4. Receiver On Setting Packets
Table 12-14 Receiver On Setting Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
Bit 7
0
0
CLS
0
Bit 7
0
0
CLS
0
7
7
Bit 6
0
0
CLS
ST
Bit 6
0
0
CLS
0
6
6
6
Bit 5
0
0
CLS
ST
Bit 5
0
0
CLS
0
5
5
5
Bit 4
1
0
CLS
ST
Bit 4
1
0
CLS
0
4
4
4
Bit 3
0
LBC
CLS
ST
Bit 3
s
LBC
CLS
0
3
3
3
3
Bit 2
1
0
CLS
ST
Bit 2
s
0
CLS
0
2
2
2
2
Bit 1
1
0
CLS
ST
Bit 1
s
0
CLS
0
1
1
1
1
Bit 0
0
0
CLS
ST
Bit 0
s
0
CLS
0
0
0
0
0
353