HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 456

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

SSR32—Serial status register 32
442
Bit
Initial value
Read/Write
Note: * Only a write of 0 for flag clearing is possible.
Transmit data register empty
0
1
Receive data register full
0
1
Overrun error
Transmit data written in TDR32 has not been transferred to TSR32
[Clearing conditions] • After reading TDRE32 = 1, cleared by writing 0 to TDRE32
Transmit data has not been written to TDR32, or transmit data written in TDR32 has been transferred to TSR32
[Setting conditions]
0
1
There is no receive data in RDR32
[Clearing conditions] • After reading RDRF32 = 1, cleared by writing 0 to RDRF32
There is receive data in RDR32
[Setting conditions] When reception ends normally and receive data is transferred from RSR32 to RDR32
Framing error
0
1
Reception in progress or completed
[Clearing conditions] After reading OER32 = 1, cleared by writing 0 to OER32
An overrun error has occurred during reception
[Setting conditions] When the next serial reception is completed with RDRF32 set to 1
Parity error
0
1
Reception in progress or completed normally
[Clearing conditions] After reading FER32 = 1, cleared by writing 0 to FER32
A framing error has occurred during reception
[Setting conditions] When the stop bit at the end of the receive data is checked for a value of 1 at completion of
Transmit end
0
1
TDRE32
Multiprocessor bit receive
Reception in progress or completed normally
[Clearing conditions] After reading PER32 = 1, cleared by writing 0 to PER32
A parity error has occurred during reception
[Setting conditions]
R/(W)
0
1
Transmission in progress
[Clearing conditions]
Transmission ended
[Setting conditions]
Multiprocessor bit transfer
7
1
0
1
• When data is written to TDR32 by an instruction
• When bit TE32 in serial control register 32 (SCR32) is cleared to 0
• When data is transferred from TDR32 to TSR32
Data in which the multiprocessor bit is 0 has been received
Data in which the multiprocessor bit is 1 has been received
*
• When RDR32 data is read by an instruction
A 0 multiprocessor bit is transmitted
A 1 multiprocessor bit is transmitted
RDRF32
R/(W)
reception, and the stop bit is 0
6
0
When the number of 1 bits in the receive data plus parity bit does not match the parity
designated by the parity mode bit (PM32) in the serial mode register (SMR32)
*
• After reading TDRE32 = 1, cleared by writing 0 to TDRE32
• When data is written to TDR32 by an instruction
• When bit TE in serial control register 32 (SCR32) is cleared to 0
• When bit TDRE32 is set to 1 when the last bit of a transmit character is sent
OER32
R/(W)
5
0
*
FER32
R/(W)
4
0
*
PER32
R/(W)
3
0
*
TEND32
H'AC
R
2
1
MPBR32
R
1
0
MPBT32
R/W
SCI32
0
0