HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 358

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

12.3.3
The Control Packet defines a number of different control bits for the FLEX decoder. The ID of
the Control Packet is 2.
Table 12-5 Control Packet Bit Assignments
Byte 3
Byte 2
Byte 1
Byte 0
FF: Force Frame 0-7. These bits enable and disable forcing the FLEX decoder to look in frames 0
through 7. When an FF bit is set, the FLEX decoder will decode the corresponding frame. Unlike
the AF bits in the Frame Assignment Packets, the system collapse of a FLEX system will not
affect frames assigned using the FF bits (e.g. Where as setting AF
is 5 will cause the decoder to decode frames 0, 32, 64, and 96, setting FF
collapse is 5 will only cause the decoder to decode frame 0.). This may be useful for acquiring
transmitted time information or channel attributes (e.g. Local ID). (value after reset=0)
SPM: Single Phase Mode. When this bit is set, the FLEX decoder will decode only one phase of
the transmitted data. When this bit is clear, the FLEX decoder will decode all of the phases it
receives. A change to this bit while the FLEX decoder is on, will not take affect until the next
block 0 of the next decoded frame. (value after reset=0)
PS: Phase Select. When the SPM bit is set, these bits define what phase the FLEX decoder should
decode according to the following table. This value is determined by the service provider. A
change to these bits while the FLEX decoder is on, will not take affect until the next block 0 of a
frame. (value after reset=0)
PS Value
PS
0
0
1
1
SBI: Send Block Information words 2-4. When this bit is set, any errored or time related block
information words 2-4 will be sent to the host. See 12.4.1, Block Information Word Packet for a
description of the words sent. (value after reset=0)
344
1
PS
0
1
0
1
Bit 7
0
FF
0
0
0
Control Packet
7
Bit 6
0
FF
SPM
SBI
6
Phase Decoded (based on FLEX Data Rate)
1600bps
a
a
a
a
Bit 5
0
FF
PS
0
5
1
Bit 4
0
FF
PS
MTC
4
0
3200bps
a
a
c
c
Bit 3
0
FF
0
0
3
Bit 2
0
FF
0
0
0
to 1 when the system collapse
2
0
6400bps
a
b
c
d
to 1 when the system
Bit 1
1
FF
0
EAE
1
Bit 0
0
FF
0
ON
0