HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 266

MCU 3/5V 60K 100-TQFP

HD6473937RXV

Manufacturer Part Number
HD6473937RXV
Description
MCU 3/5V 60K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheet

Specifications of HD6473937RXV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
59
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473937RXV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Simultaneous transmitting and receiving: The procedure for simultaneously transmitting and
receiving data is as follows.
(1) Set SO1, SI1, and SCK1 all to 1 in PMR2 to designate the SO1, SI1, and SCK1 functions.
(2) Clear SNC1 in SCR1 to 0, clear or set SNC0 to 0 or 1, and clear MRKON to 0, to select 8-bit
(3) Write the transfer data to SDRL/SDRU.
(4) When STF is set to 1 in SCSR1, SCI1 starts operating and transmit data is output from the
(5) After transmission/reception is completed, IRRS1 is set to 1 in IRR1.
(6) Read the transfer data from SDRL/SDRU.
When an internal clock is used, the serial clock is output from the SCK
transmit data output. When transmission ends, the serial clock is not output until the start flag is
next set to 1. During this interval, the SO
While transmission is halted, the output value of the SO
bit in SCSR1.
10.2.4
SCI1 has one interrupt source: transfer completion.
When SCI1 completes transfer, IRRS1 is set to 1 in IRR1. The SCI1 interrupt source can be
enabled or disabled by the IENS1 bit in IENR1.
For details, see 3.3, Interrupts.
252
synchronous mode or 16-bit synchronous mode, and select the serial clock with bits CKS3 to
CKS0. When data is written to SCR1 with MRKON in SCR1 cleared to 0, the internal state of
SCI1 is initialized.
8-bit transfer mode: SDRL
16-bit transfer mode: Upper byte to SDRU, lower byte to SDRL
SO1, or receive data is input from the SI1.
8-bit transfer mode: SDRL
16-bit transfer mode: Upper byte from SDRU, lower byte from SDRL
Interrupt Source
1
continuously outputs the last bit of the previous data.
1
pin can be changed by means of the SOL
1
simultaneously with

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