HD6473937RXV Renesas Electronics America, HD6473937RXV Datasheet - Page 304

• Manufacturer Part Number: HD6473937RXV
• Description: MCU 3/5V 60K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD6473937RXV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 59
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

SCI3 operates as follows when transmitting data.
SCI3 monitors bit TDRE in SSR, and when it is cleared to 0, recognizes that data has been written
to TDR and transfers data from TDR to TSR. It then sets bit TDRE to 1 and starts transmitting. If
bit TIE in SCR3 is set to 1 at this time, a TXI request is made.
Serial data is transmitted from the TXD3x pin using the relevant data transfer format in table 10-
14. When the stop bit is sent, SCI3 checks bit TDRE. If bit TDRE is cleared to 0, SCI3 transfers
data from TDR to TSR, and when the stop bit has been sent, starts transmission of the next frame.
If bit TDRE is set to 1, bit TEND in SSR bit is set to 1the mark state, in which 1s are transmitted,
is established after the stop bit has been sent. If bit TEIE in SCR3 is set to 1 at this time, a TEI
request is made.
Figure 10-9 shows an example of the operation when transmitting in asynchronous mode.
290
Serial
data
TDRE
TEND
LSI
operation
User
processing
Figure 10-9 Example of Operation when Transmitting in Asynchronous Mode
TXI request
1
Start
bit
0
D0
D1
TDRE
cleared to 0
Data written
to TDR
Transmit
1 frame
data
(8-bit data, parity, 1 stop bit)
D7
Parity
0/1
bit
TXI request
Stop
bit
1
Start
bit
0
D0
1 frame
D1
Transmit
data
D7
Parity
0/1
bit
TEI request
Stop
bit
1
Mark
state
1