EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 115

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
October 2007
Multiplier and First-Stage Adder
The multiplier stage natively supports 9 × 9, 12 × 12, 18 × 18, or 36 × 36
multipliers. Other wordlengths are padded up to the nearest appropriate
native wordlength; for example, 16 × 16 would be padded up to use
18 × 18. Refer to
details. Depending on the data width of the multiplier, a single DSP block
can perform many multiplications in parallel.
Each multiplier operand can be a unique signed or unsigned number.
Two dynamic signals, signa and signb, control the representation of
each operand, respectively. A logic 1 value on the signa/signb
signal indicates that data A/data B is a signed number; a logic 0
value indicates an unsigned number.
multiplication result for the various operand sign representations. The
result of the multiplication is signed if any one of the operands is a signed
value.
Each Half Block has its own signa and signb signal. Therefore, all of the
data A inputs feeding the same DSP Half Block must have the same sign
representation. Similarly, all of the data B inputs feeding the same DSP
Half Block must have the same sign representation. The multiplier offers
full precision regardless of the sign representation in all operational
modes except for full precision 18 x 18 loopback and Two-Multiplier
Adder modes. Refer to
for details.
1
The outputs of the multipliers are the only outputs that can feed into the
first-stage adder, as shown in
in a DSP block (two adders per half DSP block). The first-stage adder
block has the ability to perform addition and subtraction. The control
signal for addition or subtraction is static and has to be configured upon
Table 5–4. Multiplier Sign Representation
Unsigned (logic 0)
Unsigned (logic 0)
Signed (logic 1)
Signed (logic 1)
(signa Value)
When the signa and signb signals are unused, the Quartus II
software sets the multiplier to perform unsigned multiplication
by default.
Data A
“Independent Multiplier Modes” on page 5–18
“Two-Multiplier Adder Sum Mode” on page 5–25
Figure
Unsigned (logic 0)
Unsigned (logic 0)
Signed (logic 1)
Signed (logic 1)
(signb Value)
5–6. There are four first-stage adders
Stratix III Device Handbook, Volume 1
Table 5–4
Data B
DSP Blocks in Stratix III Devices
shows the sign of the
Unsigned
Signed
Signed
Signed
Result
for more
5–15