EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 250
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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OCT Calibration
Figure 7–16. OCT Calibration Block (CB) Location in EP3SL200, EP3SE260 and EP3SL340
Note to
(1)
7–32
Stratix III Device Handbook, Volume 1
Figure 7–16
representation only.
Figure
CB 0
CB 1
7–16:
Bank 1B
Bank 1C
Bank 2C
Bank 2B
Bank 1A
Bank 2A
is a top view of the silicon die that corresponds to a reverse view for flip-chip packages. It is a graphical
Sharing OCT Calibration Block in Multiple I/O Banks
An OCT calibration block has the same V
contains the block. OCT R
different V
calibration blocks. You can configure I/O banks to receive calibrated
codes from any OCT calibration block with the same V
with the same V
particular I/O bank has a OCT calibration block.
For example,
V
can use one OCT calibration block to calibrate the group of I/O banks
placed around the periphery. Since 3B, 4C, 6C, and 7B have the same
V
and 7B) with the OCT calibration block located in bank 7A. You can
CCIO
CCIO
voltage. If a group of I/O banks have the same V
as bank 7A, you can calibrate all four I/O banks (3B, 4C, 6C,
EP3SL200
EP3SE260
EP3SL340
CCIO
Figure 7–17
voltage standards, up to the number of available OCT
CCIO
can share one OCT calibration block, even if that
shows a group of I/O banks that have the same
S
Bank 6B
Bank 6C
Bank 5C
Bank 5B
Bank 5A
calibration is supported on all I/O banks with
Bank 6A
CB 5
CB 6
CCIO
as the I/O bank that
I/O bank with OCT
calibration block
I/O bank without OCT
calibration block
CCIO
Altera Corporation
CCIO
Note (1)
. All I/O banks
November 2007
voltage, you
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