EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 230

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Stratix III I/O Banks
Figure 7–6. Number of I/Os in Each Bank in EP2SL200, EP3SE260, EP3SL340 Devices in the 1517-Pin
FineLine BGA Package
Notes to
(1)
(2)
7–12
Stratix III Device Handbook, Volume 1
All I/O pin counts include eight dedicated clock inputs (CLK1p, CLK1n, CLK3p, CLK3n, CLK8p, CLK8n,
CLK10p, and CLK10n) and eight dedicated corner PLL clock inputs (PLL_L1_CLKp, PLL_L1_CLKn,
PLL_L4_CLKp, PLL_L4_CLKn, PLL_R4_CLKp, PLL_R4_CLKn, PLL_R1_CLKp, and PLL_R1_CLKn) that can
be used for data inputs.
Figure 7–6
representation only.
Figure
is a top view of the silicon die that corresponds to a reverse view for flip-chip packages. It is a graphical
7–6:
Number
of I/Os
50
24
42
42
24
50
Notes
Name
Bank
Bank 1A
Bank 1B
Bank 1C
Bank 2C
Bank 2B
Bank 2A
(1),
(2)
EP3SE260
EP3SL200
EP3SL340
Bank 6A
Bank 6B
Bank 6C
Bank 5C
Bank 5B
Bank 5A
Name
Bank
Number
of I/Os
50
24
24
50
42
42
Altera Corporation
November 2007