EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 187

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Figure 6–26. External Feedback Mode in Stratix III Devices
Altera Corporation
November 2007
inclk
÷n
In this mode, the output of the M counter (FBOUT) feeds back to the PLL
fbin input (using a trace on the board) becoming part of the feedback
loop. Also, you use one of the dual-purpose external clock outputs as the
fbin input pin in EFB mode.
When using this mode, you must use the same I/O standard on the input
clock, feedback input, and output clocks. Left/Right PLLs support EFB
mode when using single-ended I/O standards only.
EFB mode implementation in Stratix III devices.
PFD
CP/LF
VCO
Clock Networks and PLLs in Stratix III Devices
÷C0
÷C1
÷m
Stratix III Device Handbook, Volume 1
fbout
fbin
PLL_<#>_CLKOUT#
PLL_<#>_CLKOUT#
Figure 6–26
external
board
trace
shows
6–37