EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 46

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Adaptive Logic Modules
Figure 2–9. Input Function in Normal Mode
Notes to
(1)
(2)
2–12
Stratix III Device Handbook, Volume 1
If datae1 and dataf1 are used as inputs to the six-input function, then datae0 and dataf0 are available for
register packing.
The dataf1 input is available for register packing only if the six-input function is un-registered.
Figure
These inputs are available for register packing.
2–9:
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
(2)
Extended LUT Mode
Use the extended LUT mode to implement a specific set of seven-input
functions. The set must be a 2-to-1 multiplexer fed by two arbitrary
five-input functions sharing four inputs.
of supported seven-input functions utilizing extended LUT mode. In this
mode, if the seven-input function is unregistered, the unused eighth
input is available for register packing.
Functions that fit into the template shown in
in designs. These functions often appear in designs as "if-else" statements
in Verilog HDL or VHDL code.
6-Input
LUT
Note (1)
labclk
D
D
reg0
reg1
Figure 2–10
Q
Q
Figure 2–10
To general or
local routing
To general or
local routing
To general or
local routing
shows the template
Altera Corporation
occur naturally
October 2007