EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 475

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Introduction
Altera Corporation
October 2007
SIII51015-1.2
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In critical applications such as avionics, telecommunications, system
control, and military applications, it is important to be able to do the
following:
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■
The error detection feature has been enhanced in the Stratix
The error detection and recovery time for single event upset (SEU) in
Stratix III devices is reduced compared to Stratix II devices.
Information on SEU is located on the Products page of the Altera
website (www.altera.com).
Dedicated circuitry is built into Stratix III devices and consists of a cyclic
redundancy check (CRC) error detection feature that can optionally check
for SEUs continuously and automatically.
This section describes how to activate and use the error detection CRC
feature when your Stratix III device is in user mode and describes how to
recover from configuration errors caused by CRC errors.
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1
Using CRC error detection for the Stratix III family has no impact on
fitting or performance.
For more information on CRC, refer to
CRC in Altera FPGA
Confirm that the configuration data stored in a Stratix III device is
correct.
Alert the system to the occurrence of a configuration error.
For Stratix III devices, use of the error detection CRC feature is
provided in the Quartus
Stratix III devices only support the error detection CRC feature
at 1.1 V for VCCL. This feature is not supported if Stratix III
operates at 0.9 V for VCCL.
Devices.
15. SEU Mitigation in
®
II software starting with version 6.1.
AN 357: Error Detection Using
Stratix III Devices
®
III family.
®
15–1