EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 205

• Manufacturer Part Number: EP2AGX95EF29I5N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29I5N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 8: High-Speed Differential I/O Interfaces and DPA in Arria II GX Devices
Source-Synchronous Timing Budget
Figure 8–19. Bit Order and Word Boundary for One Differential Channel
Note to
(1) These are only functional waveforms and are not intended to convey timing information.
© July 2010
Transmitter Channel
Operation (x8 Mode)
Operation (x8 Mode)
Receiver Channel
rx_out [7..0]
tx_outclock
rx_outclock
rx_inclock
Figure
tx_out
rx_in
Altera Corporation
8–19:
X
7
X X X X X X X
6
X X X X X X X X
Table 8–6
The MSB and LSB positions increase with the number of channels used in a system.
Table 8–6. Differential Bit Naming
5
Previous Cycle
4
Receiver Channel Data
3
2
lists the conventions for differential bit naming for 18 differential channels.
Number
1
10
11
12
13
14
15
16
17
18
0
1
2
3
4
5
6
7
8
9
MSB
7
X
6
X
Current Cycle
5
X X X X X X X X
X
4 3
X
X
2
X
1
LSB
X
0
X X X
X
MSB Position
Next Cycle
X
103
111
119
127
135
143
X
15
23
31
39
47
55
63
71
79
87
95
7
(Note 1)
X X X X 7 6 5 4
X X X X X
X
Internal 8-Bit Parallel Data
X
X
X
X
Arria II GX Device Handbook, Volume 1
X
X
X
X
LSB Position
3 2 1 0 X X X X
X
104
112
120
128
136
16
24
32
40
48
56
64
72
80
88
96
0
8
X
X
X
X
8–21