EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 295

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EP2AGX95EF29I5N

Manufacturer Part Number
EP2AGX95EF29I5N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX95EF29I5N

Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2AGX95EF29I5N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2AGX95EF29I5N
Manufacturer:
ALTERA
0
© July 2010
AIIGX51011-3.0
Altera Corporation
f
This chapter describes the boundary-scan test (BST) features that are supported in
Arria
document.
This chapter includes the following sections:
Arria II GX devices support IEEE Std. 1149.1 and IEEE Std. 1149.6. The IEEE Std.
1149.6 is only supported on the high-speed serial interface (HSSI) transceivers in
Arria II GX devices. The IEEE Std. 1149.6 enables board-level connectivity checking
between transmitters and receivers that are AC coupled (connected with a capacitor
in series between the source and destination).
For information about the following topics, refer to the
Boundary-Scan Testing for Arria GX Devices
“IEEE Std. 1149.6 Boundary-Scan Register”
“BST Operation Control” on page 11–3
“I/O Voltage Support in a JTAG Chain” on page 11–5
“Boundary-Scan Description Language Support” on page 11–6
®
IEEE Std. 1149.1 BST architecture and circuitry
TAP controller state-machine
IEEE Std. 1149.1 JTAG instructions
JTAG instructions code with descriptions
IEEE Std. 1149.1 BST guidelines
II GX devices. The features are similar to Arria GX devices, unless stated in this
11. JTAG Boundary-Scan Testing
chapter:
IEEE 1149.1 (JTAG)
Arria II GX Device Handbook, Volume 1

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