EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 271

• Manufacturer Part Number: EP2AGX95EF29I5N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29I5N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices
Dedicated Remote System Upgrade Circuitry
Table 9–14. Remote System Upgrade Registers (Part 2 of 2)
© July 2010
Update register
Status register
Altera Corporation
Register
The remote system upgrade control and status registers are clocked by the 10-MHz
internal oscillator (the same oscillator that controls the user watchdog timer).
However, the remote system upgrade shift and update registers are clocked by the
user clock input (RU_CLK).
Remote System Upgrade Control Register
The remote system upgrade control register stores the application configuration page
address and user watchdog timer settings. The control register functionality depends
on the remote system upgrade mode selection. In remote update mode, the control
register page address bits are set to all zeros (24'b0 = 0×000000) at power up to load
the factory configuration. A factory configuration in remote update mode has write
access to this register.
The control register bit positions are shown in
In the figure, the numbers show the bit position of a setting in a register. For example,
bit number 25 is the enable bit for the watchdog timer.
Figure 9–26. Remote System Upgrade Control Register
The application-not-factory (AnF) bit indicates whether the current configuration
loaded in the Arria II GX device is the factory configuration or an application
configuration. This bit is set low by the remote system upgrade circuitry when an
error condition causes a fall-back to the factory configuration. When the AnF bit is
high, the control register access is limited to read operations. When the AnF bit is low,
the register allows write operations and disables the watchdog timer.
In remote update mode, the factory configuration design sets this bit high (1'b1) when
updating the contents of the update register with the application page address and
watchdog timer settings.
37 36 35 34 33 32 31 30 29 28 27 26
This register contains data similar to that in the control register. However, it can
only be updated by the factory configuration by shifting data into the shift
register and issuing an update operation. When a reconfiguration cycle is
triggered by the factory configuration, the control register is updated with the
contents of the update register. During a capture in a factory configuration, this
register is read into the shift register.
This register is written to by the remote system upgrade circuitry on every
reconfiguration to record the cause of the reconfiguration. This information is
used by the factory configuration to determine the appropriate action following
a reconfiguration. During a capture cycle, this register is read into the shift
register.
Wd_timer[11..0]
Wd_en
Description
Figure 9–26
25
24 23 22 .. 3
Arria II GX Device Handbook, Volume 1
PGM[23..0]
and defined in
2
1
AnF
0
Table
9–15.
9–51