EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 45

• Manufacturer Part Number: EP2AGX95EF29I5N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29I5N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 3: Memory Blocks in Arria II GX Devices
Memory Features
Figure 3–4. Arria II GX Address Clock Enable during Read Cycle Waveform
© November 2009
Altera Corporation
latched address
(inside memory)
addressstall
q (asynch)
rdaddress
Figure 3–3
referred to by the port name addressstall.
Figure 3–3. Arria II GX Address Clock Enable Block Diagram
Figure 3–4
q (synch)
inclock
rden
doutn-1
doutn
an
shows an address clock enable block diagram. The address clock enable is
shows the address clock enable waveform during the read cycle.
a0
doutn
addressstall
address[0]
address[N]
a0
dout0
a1
clock
dout0
a2
1
0
1
0
a1
dout1
a3
dout1
address[0]
address[N]
register
register
a4
a4
dout4
Arria II GX Device Handbook, Volume 1
a5
address[0]
address[N]
dout4
a5
dout5
a6
3–5