XC4VFX40-10FFG1152C Xilinx Inc, XC4VFX40-10FFG1152C Datasheet - Page 309

• Manufacturer Part Number: XC4VFX40-10FFG1152C
• Description: IC FPGA VIRTEX-4 FX 40K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX40-10FFG1152C

• Number Of Logic Elements/cells: 41904
• Number Of Labs/clbs: 4656
• Total Ram Bits: 2654208
• Number Of I /o: 448
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Table 6-41: Equivalent V
Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
Notes:
1. These numbers are based on the package files and device pinout. Most of the limitations are based on the availability of GND pins
2. Bank 0 in all devices contains no user I/O. Therefore, SSO analysis is unnecessary for Bank 0.
Virtex®-4 FPGA (LX Family)
FF676
FF1148
FF1513
Virtex-4 FPGA (SX Family)
FF676
FF1148
Virtex-4 FPGA (FX Family)
FF672
FF676
FF1152
FF1517
in the vicinity of the bank. There are a few instances where the limitation is due to V
Package
R
Equivalent V
0
4
4
3
4
4
2
4
4
3
Since ground pins and V
the number of effective V
physical V
pin pairs in each bank of each sparse chevron package.
14
CCO
1
2
8
2
8
2
2
2
8
/GND Pairs per Bank: Sparse Chevron
14
2
2
8
2
8
2
2
2
8
CCO
CCO
3
2
2
2
2
2
2
2
2
2
/GND pin pairs.
/GND Pairs: Sparse Chevron
4
2
2
2
2
2
2
2
2
2
10
CCO
5
8
9
8
9
8
8
9
9
CCO
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pins are connected to common structures inside the package,
/GND pin pairs in a bank can differ from the number of
6
8
9
9
8
9
8
8
9
9
Table 6-41
Bank Number
7
8
9
9
8
9
8
8
9
9
10
8
8
9
8
9
8
8
9
8
shows the number of equivalent V
9
8
9
9
8
9
2
8
8
9
Simultaneous Switching Output Limits
CCO
10
10
8
9
8
9
2
8
8
9
pins.
11
---
10
---
---
---
9
9
8
9
12
---
---
---
---
9
9
9
8
9
13
---
---
---
---
---
8
9
8
9
14
---
---
---
---
---
8
9
8
9
CCO
15
---
---
---
---
---
---
---
---
/GND
9
16
---
---
---
---
---
---
---
---
309
9