XC4VFX40-10FFG1152C Xilinx Inc, XC4VFX40-10FFG1152C Datasheet - Page 52

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XC4VFX40-10FFG1152C

Manufacturer Part Number
XC4VFX40-10FFG1152C
Description
IC FPGA VIRTEX-4 FX 40K 1152FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r

Specifications of XC4VFX40-10FFG1152C

Number Of Logic Elements/cells
41904
Number Of Labs/clbs
4656
Total Ram Bits
2654208
Number Of I /o
448
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Chapter 1: Clock Resources
52
BUFIO VHDL and Verilog Templates
VHDL Template
Verilog Template
Declaring Constraints in UCF File
The following examples illustrate the instantiation of the BUFIO module in VHDL and
Verilog.
--Example BUFIO declaration
component BUFIO
port(
end component;
--Example BUFIO instantiation
U_BUFIO : BUFIO
Port map (
--Declaring constraints in VHDL file
attribute LOC : string;
attribute LOC of U_BUFIO: label is "BUFIO_X#Y#";
--where # is valid integer locations of BUFIO
//Example BUFIO module declaration
module BUFIO (O, I);
endmodule;
//Example BUFIO instantiation
BUFIO U_BUFIO (
.O(user_o),
.I(user_i)
);
// Declaring constraints in Verilog
// synthesis attribute LOC of U_BUFIO is "BUFIO_X#Y#";
// where # is valid integer locations of BUFIO
INST "U_BUFIO" LOC = BUFIO_X#Y#;
where # is valid integer locations of BUFIO
O: out std_ulogic;
I: in
);
O => user_o,
I0 => user_i
);
output O;
input I;
std_ulogic
www.xilinx.com
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
R

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