XC4VFX40-10FFG1152C Xilinx Inc, XC4VFX40-10FFG1152C Datasheet - Page 319

• Manufacturer Part Number: XC4VFX40-10FFG1152C
• Description: IC FPGA VIRTEX-4 FX 40K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX40-10FFG1152C

• Number Of Logic Elements/cells: 41904
• Number Of Labs/clbs: 4656
• Total Ram Bits: 2654208
• Number Of I /o: 448
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
Full Device SSO Calculator
Other SSO Assumptions
R
LVDCI and HSLVDCI Drivers
techniques to one or both of these two banks until the average SSO of all adjacent bank
pairs is less than or equal to 105% of the SSO allowance.
Step 3: Calculate the Package SSO
Ensure the package SSO does not exceed the SSO allowance.
All Bank SSO average
= (Sum of SSO from all banks)/(number of banks available in the package)
= (51 + 51 + 0 + 60 +35 + 40 +15 + 30 + 12 + 22 + 80 + 0 + 5 + 60)/14 = 32.2%
SSO allowance > All Bank SSO average
75.4% > 32.9
OK!
If the package SSO exceeds the SSO allowance, apply ground bounce reduction techniques
to one or more of all I/O banks until the all-bank SSO average is less than or equal to the
SSO allowance.
A Microsoft Excel-based spreadsheet, the Virtex-4 FPGA SSO calculator, automates all the
PFDM and WASSO calculations. The Virtex-4 FPGA SSO calculator uses PCB geometry,
(board thickness, via diameter, and breakout trace width and length) to determine power
system inductance. It determines the smallest undershoot and logic-Low threshold voltage
among all input devices, calculates the average output capacitance, and determines the
SSO allowance by taking into account all of the board-level design parameters mentioned
in this document. In addition, the Virtex-4 FPGA SSO calculator checks the adjacent bank
and package SSO ensuring the full device design does not exceed the SSO allowance. Since
bank-number assignment for Virtex-4 devices is different from package to package due to
its columnar architecture (versus the peripheral I/O architecture of previous devices),
there is a separate tab at the bottom of the SSO calculator display for each Virtex-4 FPGA
package. This customizing allows for the arrangement of physically adjacent banks (as
they appear clockwise on each unique package, even though they are not labeled in a
contiguous manner), and the hard-coding of the number of V
The Virtex-4 FPGA SSO calculator can be downloaded from the Xilinx website at:
All limits for controlled impedance DCI I/O standards assume a 50Ω output impedance.
For higher reference resistor (RR) values, less drive strength is needed, and the SSO limit
increases linearly. To calculate the SSO limit for a controlled impedance driver with
different reference resistors, the following formula is used:
User SSO
https://secure.xilinx.com/webreg/clickthrough.do?cid=30163
=
User RR
----------------------- - Ω SSO Limit for Ω
50Ω
www.xilinx.com
Simultaneous Switching Output Limits
CCO
/GND pairs per bank.
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