XC4VFX40-10FFG1152C Xilinx Inc, XC4VFX40-10FFG1152C Datasheet - Page 77

• Manufacturer Part Number: XC4VFX40-10FFG1152C
• Description: IC FPGA VIRTEX-4 FX 40K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX40-10FFG1152C

• Number Of Logic Elements/cells: 41904
• Number Of Labs/clbs: 4656
• Total Ram Bits: 2654208
• Number Of I /o: 448
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
Phase-Shift Range
The allowed phase shift between CLKIN and CLKFB is limited by the phase-shift range.
There are two separate phase-shift range components:
•
•
In the FIXED, VARIABLE_POSITIVE, and VARIABLE_CENTER phase-shift mode, the
PHASE_SHIFT attribute is in the numerator of the following equation:
where PERIOD
In VARIABLE_CENTER and FIXED modes, the full range of the PHASE_SHIFT attribute is
always –255 to +255. In the VARIABLE_POSITIVE mode, the range of the PHASE_SHIFT
attribute is 0 to +255.
In the DIRECT phase-shift mode, the PHASE_SHIFT attribute is the multiplication factor
in the following equation:
In DIRECT modes, the full range of the PHASE_SHIFT attribute is 0 to 1023.
The FINE_SHIFT_RANGE component represents the total delay achievable by the phase-
shift delay line. Total delay is a function of the number of delay taps used in the circuit. The
absolute range is specified in the DCM Timing Parameters section of the
across process, voltage, and temperature. The different absolute ranges are outlined in this
section.
The fixed mode allows the DCM to insert a delay line in the CLKFB or the CLKIN path.
This gives access to the +FINE_SHIFT_RANGE when the PHASE_SHIFT attribute is set to
a positive value, and –FINE_SHIFT_RANGE when the PHASE_SHIFT attribute is set to a
negative value.
Absolute Range (Variable-Center Mode) = ± FINE_SHIFT_RANGE ÷ 2
The variable-center mode allows symmetric, dynamic sweeps from –255/256 to +255/256,
by having the DCM set the zero-phase-skew point in the middle of the delay line. This
divides the total delay-line range in half.
Absolute Range (Fixed) = ± FINE_SHIFT_RANGE
In the fixed mode, a phase shift is set during configuration in the range of –255/256 to
+255/256.
Absolute Range (Variable-Positive and Direct Modes) = + FINE_SHIFT_RANGE
In the variable-positive and direct modes, the phase-shift only operates in the positive
range. The DCM sets the zero-phase-skew point at the beginning of the delay line. This
produces a full delay line in one direction.
Both the PHASE_SHIFT attribute and the FINE_SHIFT_RANGE parameter need to be
considered to determine the limiting range of each application. The
Examples”
In variable and direct mode, the PHASE_SHIFT value can dynamically increment or
decrement as determined by PSINCDEC synchronously to PSCLK, when the PSEN input
is active.
PHASE_SHIFT attribute range
FINE_SHIFT_RANGE DCM timing parameter range
Phase Shift (ns) = (PHASE_SHIFT/256) × PERIOD
Phase Shift (ns) = PHASE_SHIFT × DCM_TAP
section illustrates possible scenarios.
CLKIN
denotes the effective CLKIN frequency.
www.xilinx.com
CLKIN
DCM Design Guidelines
“Phase-Shift
Virtex-4 Data Sheet
77