TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 117

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

16. DMACC0Configuration (DMAC Channel0 Configuration Register)
[Description]
[31:19]
[18]
[17]
[16]
[15]
[14]
[13:11]
[10]
[9:6]
[5]
[4:1]
[0]
a. < ITC >
Bit
Note: Please refer to Table 3.8.2 DMA request number chart.
Register<I>=1.
It is an enable register of transfer end interrupt.
Transfer end interrupt is generated by setting <ITC>=1 and DMACCxControl
Halt
Active
Lock
ITC
IE
FlowCntrl
DestPeripheral
SrcPeripheral
E
Symbol
Bit
Type
R/W
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TMPA901CM- 116
Undefined
0y0
0y0
0y0
0y0
0y0
0y000
Undefined
0y000
Undefined
0y000
0y0
Reset
Value
0y000
0y001
0y010
0y011
Read as undefined. Write as zero.
0y0: DMA requests accepted
0y1: DMA requests ignored
Read:
Write:
0y0: Disable lock transfers
0y1: Enable lock transfers
Terminal count interrupt enable register
0y0: Disable interrupts
0y1: Enable interrupts
Error interrupt enable register
0y0: Disable interrupts
0y1: Enable interrupts
0y100-0y111: Reserved
Read as undefined. Write as zero.
Transfer destination peripheral (Note1)
0y000-0y1111
Read as undefined. Write as zero.
Transfer source peripheral (Note1)
0y000-0y1111
Channel enable
0y0: Disable
0y1: Enable
FlowCntrl
set value
Address
0y0: No data in the FIFO
0y1: The FIFO has data
Invalid
Memory to Memory
Memory to Peripheral
Peripheral to Memory
Peripheral to Peripheral
(0xF410_0000) + 0x0110
Description
Transfer Mode
TMPA901CM
2010-07-29