TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 739

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.24.4.1 Entering the PCM state
off. To enter the Power Cut Mode, the following procedure must be observed to prepare for
operation after exiting the Power Cut Mode, to define the external pin states during the
Power Cut Mode, and to ensure proper mode transition.
In the Power Cut Mode, power supplies to the internal circuits including the CPU are cut
1.
Execution procedure
are provided for each external pin.
disabled. For details, refer to the chapter on the TSI.
(1) Program execution area
(2) Remove possible impediments to transition to the PCM mode
(3) Set the pin states
(4) Set the wakeup conditions
wakeup trigger. (Interrupts not used can be masked.)
(5) Stop OFD operation
b. Stop the watchdog timer (The watchdog timer is initially stopped.)
c. Stop the AD converter.
d. Stop DMA operation
a. Disable interrupts
Set the external pin for waking up from the PCM state.
The enable register, edge selection register and wakeup interrupt flag register
To use PD6 as the TSI interrupt pin (INTA), the debounce circuit must be
Stop the OFD circuit operation
The internal RTC, an external key or an external interrupt can be selected as a
For entering the PCM state, the program must be executing in the internal
RAM.
Before entering the PCM mode, stop all functions that may interfere with the
mode transition operation.
Set the backup registers to fix the state of each pin during the PCM state.
In the PCM state, the port states are controlled by the backup registers in the
PMC.
PC2 should be set as the PWE pin.
Only the CKE pin (which is controlled by SDRAM) allows the pin state on
exiting the PCM state to be different from the pin state after system reset. For
details, refer to 3.24.4.3.
Stop the LCD controller.
Disable the SDRAM auto refresh function (so that the self refresh mode is
enabled.)
Stop DMA transfer.
TMPA901CM- 738
TMPA901CM
2010-07-29