TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 400

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.14.6.5 Transmitter/Receiver Selection
I2C0CR2<TRX> is cleared to 0, it is configured as a receiver.
bit (R/W) sent from the master is 1, and is cleared to 0 if the direction bit is 0.
returned from the slave device, if the transmitted direction bit is 1, and is set to 1 if the
direction bit is 0. If no acknowledge is returned, I2C0SR<TRX> remains unchanged.
detected on the bus. Table 3.14.5 summarizes the operation of I2C0SR<TRX> in slave and
master modes.
recognized and bits immediately following a start condition are handled as data. Therefore,
I2C0SR<TRX> is not changed by hardware.
Note: When I2C0CR1<NOACK> = 1, the slave address detection and general call detection are disabled, and
Slave
mode
Master
mode
When I2C0CR2<TRX> is set to 1, I
In I
In master mode, I2C0SR<TRX> is cleared to 0 by hardware, after acknowledge is
I2C0SR<TRX> is cleared to 0 by hardware when a stop condition or arbitration lost is
When I
Mode
2
thus I2C0SR<TRX> remains unchanged.
Table 3.14.5 I2C0SR<TRX> operation in slave and master modes
C data transfer in slave mode, I2C0SR<TRX> is set to 1 by hardware if the direction
2
C is used with the free data format, the slave address and direction bit are not
Direction bit
0
1
0
1
When the received slave address
matches the slave address set in
I2C0AR<SA>
When the ACK signal is returned.
Condition for state change
TMPA901CM- 399
2
C is configured as a transmitter. When
Changed <TRX>
state
0
1
1
0
TMPA901CM
2010-07-29