TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 389

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

c. <BB>
d. <PIN>
e. <AL>
f. <AAS>
g. <AD0>
detection of a stop condition. When the device is operating as a slave, this bit is set to 1 to
monitor the generation of a stop condition even if the device is not selected by the master
and is not involved in transfer operation.
the master matches the slave address set in I2C0AR<SA[6:0]>. This bit is then cleared to
0 after the internal interrupt is released and remains 0 until a stop condition or a start
condition by the restart procedure appears on the bus and it is again set to 1 by a slave
address match in address transfer after that start condition.
transfer after a start condition) and remains set until a stop condition or a start condition
by the restart procedure appears on the bus. I2C0SR<AAS> is also set to 1 on detection of
a general call. However, this bit is cleared to 0 at the next data transfer as described
earlier.
This bit monitors the bus status.
0y0: The bus is free.
0y1: The bus is busy.
This bit is set to 1 after a start condition is detected on the bus. It is cleared to 0 on
While this bit is set to 1, the start condition cannot be generated.
This bit monitors the service request state and SCL state.
0y0: Service request present, SCL line = low
0y1: No service request, SCL line = free
This bit monitors the detection of arbitration lost.
0y0: Invalid
0y1: Detected
This bit monitors the detection of a slave address match.
0y0: Invalid
0y1: Detected
This bit monitors the detection of a general call.
0y0: Invalid
0y1: Detected
When the device is operating as a slave, this bit is set to 1 if the slave address sent from
This bit is set to 1 on detection of a general call (the SDA line is held low during address
TMPA901CM- 388
TMPA901CM
2010-07-29