TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 776

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

3.25.4
3.25.5
3.25.4.1 Hardware Reset
3.25.4.2 Software Reset
by the USBPON pin (PT4).
Then, setting the LPSC bit in the HcRhStatus register to 1 makes the USBPON pin output high
level.
on this pin, the USBHC sets the OCI bit in the OHCI HcRhStatus register to 1. (To use PT5 as
the USBOCn pin, the port T control register (PTFC) must be set appropriately.)
The USBHC is initialized by a hardware or software reset.
The USBHC has a control signal for an external power IC for Vbus. This signal is controlled
To use PT4 as the USBPON pin, the port T control register (PTFC) must be set appropriately.
The USBOCn pin (PT5) is used to detect overcurrent conditions. When low level is detected
OFD reset, PCM release).
HcCommandStatus register is set to 1.
Reset
Bus Power Control
A hardware reset is generated by the external reset pin or internal reset(WDT reset,
A
software
The Host Controller Driver does not modify the InterruptRouting bit and the
RemoteWakeupConnected bit in the HcControl register.
All OHCI registers are initialized.
The HcBCR0 register is not initialized.
The USBHC outputs the reset signal on the USB bus
The USB state changes to the USBSUSPEND state.
(The FunctionalState bit in the HcController register is set to 0x03
All registers are initialized.
The USBHC outputs the reset signal on the USB bus
The USB state changes to the USBRESET state.
List processing and SOF token generation are disabled.
The FrameNumber field of the HcFmNumber register is not incremented.
(USBSUSPEND).)
reset
is
generated
TMPA901CM- 775
when
the
HostControllerReset
TMPA901CM
bit
2010-07-29
in
the