TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 820

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

1. CLKSCR1 (Oscillation frequency detection control register 1)
2. CLKSCR2 (Oscillation frequency detection control register 2)
[31:8]
[7:0]
[31:8]
[7:0]
0x06: Disable writing to the CLKSCR2, CLKSCR3, CLKSMN and CLKSMX registers
0xF9: Enable writing to the CLKSCR2, CLKSCR3, CLKSMN and CLKSMX registers
0x00: Enable the OFD operation
0xE4: Disable the OFD operation
a. < CLKWEN >
a. < OFDEN >
[Explanation]
[Explanation]
Bit
Bit
Note 1: Only “0x06” and “0xF9” can be written to CLKSCR1. All values other than “0xF9” are handled as
Note 1: Only “0x00” and “0xE4” can be written to CLKSCR2. Writing a value other than “0x00” and “0xE4” to
Note 2: When the disable code “0x06” is written to CLKSCR1, writing to CLKSCR2 is disabled and any write
Note3: It takes 2 fs cycles in maximums until the configuration is executed after writing into register. So when
“0x06”, disabling writing to CLKSCR2, CLKSCR3, CLKSMN and CLKSMX.
CLKSCR2 is invalid (the register value cannot be changed.)
attempts are ignored. Even when write operation is disabled, CLKSCR2 can be read.
writing it in this register once, other configurations should be set after passing 2 fs cycles. The
Enable/Disable status flag is not available. The read data value and the operating state are not much in
time-lag period.
CLKWEN
CLKSEN
Symbol
Symbol
Bit
Bit
R/W
R/W
Type
Type
TMPA901CM - 819
Undefined
0x06
Undefined
0x00
Reset
Reset
Value
Value
Read as undefined. Write as zero.
OFD register write enable code:
0x06: Disable writing to CLKSCR2, CLKSCR3, CLKSMN and
0xF9: Enable writing to CLKSCR2, CLKSCR3, CLKSMN and
Others: Reserved (Note 1)
Read as undefined. Write as zero.
OFD operation enable code:
0x00: Disable
0xE4: Enable
Others: Invalid (Note 1)
CLKSMX
CLKSMX
Description
Description
Address = (0xF009_0000)+(0x0000)
Address = (0xF009_0000)+(0x0004)
TMPA901CM
2010-07-29