TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 376

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

(2) When I2C0SR<MST> = 0 (Slave mode)
performed when I
conditions:
After completion of the word transfer in which arbitration lost occurred, an I2CINT0
interrupt request is generated. Table 3.14.1 shows the I2CINT0 interrupt request and
I2C0SR<PIN> operations when arbitration lost occurs.
• When data transfer is completed after a matched slave address or general call is
• When I2C0CR1<NOACK> is 0, after the acknowledge signal is output to indicate
• When I2C0CR1<NOACK> is 0, after the acknowledge signal is output to indicate
The following explains normal slave mode operations and the operations to be
In slave mode, an I2CINT0 interrupt request is generated by the following
I
2
that the received slave address has matched the slave address set in I2C0AR<SA>
that a general call has been received
received.
C changes to slave mode if it loses arbitration while operating in master mode.
2
C changes to slave mode after losing arbitration on the bus.
TMPA901CM- 375
TMPA901CM
2010-07-29