TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 847

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

No. Symbol
1-1
1-2
4.3.5
2
3
4
5
6
7
8
9
Read
cycle
Write
cycle
AC measurement conditions
t
t
t
t
WHP
t
t
t
t
RHP
REA
t
t
(Basic clock synchronous
WC
WP
RC
OH
DH
RP
DS
to internal f
NAND Flash Controller AC Electrical Characteristics
AC measurement conditions
Note 1: The “Equation” column in the table shows the specifications under the conditions DVCC3IO 3.0 to 3.6 V
Note 2: The letter “n” in the equations represents the value set in NDFMCR2<SPLR[2:0]>, the letter “m” the value
NDWEn
NDWEn
NDREn
NDD0 to NDD7
NDD0 to NDD7
The letter “T” used in the equations in the table represents the period of internal bus frequency (f
which is one-half of the CPU clock (f
Output level: High
Input level: High
NDREn
Read access cycle
Write access cycle
NDREn low level pulse width
NDREn high level pulse width
NDREn data access time
Read data hold time
NDWEn low level pulse width
NDWEn high level pulse width
Write data setup time
Write data hold time
HCLK
and DVCC1A
set in NDFMCR2<SPHR[2:0]>, the letter “k” the value in NDFMCR2<SPLW[2:0]>, and the letter “l” the
value in NDFMCR2<SPHW[2:0]>. Care should be taken not to use values that produce negative results.
)
Parameter
0.9
DVCC1B
0.7
CL
DVCC3IO, Low
DVCC3IO, Low
SPLW2:0 = "3"
40 pF
SPLR2:0 = "4"
DVCC1C
TMPA901CM- 846
t
t
REA
t
RP
WP
FCLK
).
1.4 to 1.6 V.
Data output
0.1
(m) T -10.0
(n) T -10.0
(k) T -10.0
(k) T -10.0
(l) T -10.0
(l) T -10.0
(n + m) T
(k + l) T
t
0.3
DS
Min
0
DVCC3IO
Data input
DVCC3IO
Equation
SPHW2:0 = "3"
SPHR2:0 = "2"
(n) T
t
WHP
t
OH
Max
t
RHP
14
t
DH
100 MHz
(m=3)
(n=3)
(k=3)
(l=3)
60.0
60.0
20.0
20.0
16.0
20.0
20.0
20.0
20.0
0
96 MHz
(m=3)
(n=3)
(k=3)
(l=3)
62.5
62.5
21.2
21.2
17.2
21.2
21.2
21.2
21.2
TMPA901CM
0
2010-07-29
Unit
ns
HCLK
),