TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 840

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

No.
4.3.4
Measuring condition
Loaded capacitance
10 CKE set-up time
11 Command set-up time
12 Command hold time
1 CLK cycle time
2 DMCSCLK high level width
3 DMCSCLK low level width
4 Access time from CLK(CL* 2)
5 Data hold time from internal read
6 Data set-up time
7 Data hold time
8 Address set-up time
9 Address hold time
Connection
Register
Note: The “Equation” column in the table shows the specifications under the conditions DVCCM
*CL = CAS latency
Note: The internal bus cycle is T=10ns minimum value when the guaranteed temperature is 0 to 70 degree.
The internal bus cycle is T=13.3ns minimum value when the guaranteed temperature is -20 to 85 degree.
SDR SDRAM Controller Electrical Characteristics
DMCSCLK pin: CL
Others: CL
AC measurement conditions
The letter “T” used in the equations in the table represents the period of internal bus frequency (f
which is one-half of the CPU clock (f
Output level: High
Input level: High
DVCC1A
1. DVCC3IO
2. DVSSCOMx
3. DMCCLKIN pin connect to DVSSCOMx
1. PMCDRV<DRV_MEM1:0>
2. dmc_user_config3
Parameter
DVCC1B
25 pF
0.9
0.7
0.7
15pF
DVCC1C
SELMEMC
DVCCM, Low
DVCCM, Low
SELDVCCM
Symbol
0x0000_0000 (16bit bus width memory)
TMPA901CM- 839
t
t
t
CMH
t
t
t
t
t
t
t
CKS
CMS
t
t
CK
CH
AC
HR
DS
DH
AH
CL
AS
1.4 to 1.6 V.
FCLK
DVCC3IO
0.5T
0.5T
0.5T
0.5T
0.5T
0.5T
0.5T
0.5T
0.5T
0y11 (Full Drive)
).
0.1
Min
0.3
2.0
T
DVCC3IO
Equation
1.5
1.5
3.0
4.0
3.0
4.0
3.0
3.0
4.0
DVCCM
DVCCM
T
0.3
Max
4.0
100 MHz 96 MHz
3.5
3.5
6.0
2.0
2.0
1.0
2.0
1.0
2.0
2.0
1.0
10
10.4
3.7
3.7
6.4
2.0
2.2
1.2
2.2
1.2
2.2
2.2
1.2
3.0 to 3.6 V and
TMPA901CM
2010-07-29
Unit
HCLK
ns
),