TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 789

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

Read/Write
(HCD)
Read/Write
(HC)
Read/Write
(HCD)
Read/Write
(HC)
bit Symbol
Reset state
bit Symbol
Reset state
[31:4]
[3:0]
Bit
9.
Descriptor of the Control list.
The HcControlHeadED register contains the physical address of the first Endpoint
HcControlHeadED Register
Mnemonic
CHED
－
31
15
0
0
30
14
0
0
ControlHeadED
Reserved
29
13
0
0
Field name
28
12
0
0
27
11
TMPA901CM- 788
0
0
26
10
0
0
CHED
R/W
The HC traverses the Control list starting with the HcControlHeadED
pointer. The content is loaded from HCCA during the initialization of
the HC.
R
25
9
0
0
24
8
0
0
CHED
R/W
R
23
7
0
0
22
6
0
0
Address
Function
21
5
0
0
20
4
0
0
(0xF450_0000) + (0x0020)
19
3
0
18
Reserved
2
0
TMPA901CM
2010-07-29
17
1
0
16
0
0