TMPA901CMXBG Toshiba, TMPA901CMXBG Datasheet - Page 94

• Manufacturer Part Number: TMPA901CMXBG
• Description: Microcontrollers (MCU) 32-bit RISC MCU 16kb ARM926EJ 16kb 200Mhz
• Manufacturer: Toshiba

Specifications of TMPA901CMXBG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): -
• Rom Type: ROMless
• Ram (kbytes): 32
• Number Of Pins: 177
• Package: BGA
• Vcc: 3V
• Tft Lcd Controller: Y
• Touchscreen Controller: Y
• Usb Host Fs With Phy: Y
• Usb Device Hs With Phy: Y
• Sd Host Controller: -
• Cmos Image Sensor Interface: -
• I2s: 1
• Ssp (ch) Spi: 1
• I2mc/sio (ch): 1
• Uart/sio (ch): 2
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 8
• 10-bit Ad Converter: 4
• 12-bit Da Converter: -
• 16-bit Timer / Counter: 6
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Low-power Modes: Y
• Lead Free Status / Rohs Status: Details

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DMA Transfer Direction
Memory-to-Peripheral
Peripheral-to-Memory
Memory-to-Memory
(Note 2)
Peripheral-to-Peripheral
Note 1: Peripheral that can use the single request: UART and LCDDA.
Note 2:You must program memory-to-memory transfers with a low channel priority , otherwise the other DMA
DMA Transfer Types
1. Memory-to-peripheral
2. Peripheral-to-Memory
channels cannot access the bus until the huge memory-to-memory transfer has finished.
Peripheral
DMAC
Peripheral
Peripheral
DMAC
Source peripheral
Destination
peripheral
DMA Request
Generator
DMACBREQ
DMACCLR
DMACBREQ
AMBA Bus
DMACSREQ
DMACCLR
TMPA901CM- 93
Burst request
Burst request/
Single request
(Note 1)
None
Burst request/
Single request
(Note 1)
Burst request
Request
Used
DMA
1: Use bust request in all transactions
2: When the single request, set DMAC busrt to 1
For transactions that are not an integral multiple of the burst
The amount of data left to transfer
The amount of data left to transfer < Burst size
Start condition:
When enabled, the DMA channel commences transfers
without DMA requests.
Stop conditions:
All transfer data has finished transfer.
Disable DMAC channel
(Note 2)
1)Integral multiple
2) Single transfer
3) Not imtegral
size, use both the burst and single request signals.
of the burst size
multiple of the
burst size
Transfer size
Peripheral
DMAC
Burst request
Single request
Burst request
Single request
Description
Source side
Burst size
: Use single transfer
:Use burst transfer
Destination side
Burst request
TMPA901CM
2010-07-29