SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 158

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SAM7SE256

Manufacturer Part Number
SAM7SE256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7SE256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
21.8.1
Name:
Access:
Reset Value:
Offset:
Absolute Address: 0xFFFF FF80
• CS1A: Chip Select 1 Assignment
0 = Chip Select 1 is assigned to the Static Memory Controller.
1 = Chip Select 1 is assigned to the SDRAM Controller.
• CS2A: Chip Select 2 Assignment
0 = Chip Select 2 is assigned to the Static Memory Controller and NCS2, NCS5 and NCS6 behave as defined by the SMC.
1 = Chip Select 2 is assigned to the Static Memory Controller and the CompactFlash Logic (second slot) is activated.
Accessing the address space reserved to NCS5 and NCS6 may lead to an unpredictable outcome.
• CS3A: Chip Select 3 Assignment
0 = Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behave as defined by the SMC.
1 = Chip Select 3 is assigned to the Static Memory Controller and the NAND Flash Logic is activated.
• CS4A: Chip Select 4 Assignment
0 = Chip Select 4 is assigned to the Static Memory Controller and NCS4, NCS5 and NCS6 behave as defined by the SMC.
1 = Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic (first slot) is activated.
Accessing the address space reserved to NCS5 and NCS6 may lead to an unpredictable outcome.
• NWPC: NWAIT Pin Configuration
0 = The NWAIT device pin is not connected to the External Wait Request input of the Static Memory Controller, this multi-
plexed pin can be used as a PIO.
1 = The NWAIT device pin is connected to the External Wait Request input of the Static Memory Controller.
158
31
23
15
7
SAM7SE512/256/32
EBI Chip Select Assignment Register
30
22
14
EBI_CSA
Read/Write
0x0
0x0
6
29
21
13
5
CS4A
28
20
12
4
CS3A
27
19
11
3
CS2A
26
18
10
2
CS1A
25
17
9
1
6222F–ATARM–14-Jan-11
NWPC
24
16
8
0

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