SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 209

• Manufacturer Part Number: SAM7SE256
• Manufacturer: Atmel Corporation

Specifications of SAM7SE256

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 48 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 88
• Ext Interrupts: 88
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

23.6.5.2
Figure 23-8. Low-power Mode Behavior
6222F–ATARM–14-Jan-11
SDCKE
D[31:0]
A[12:0]
(input)
SDCS
SDCK
RAS
CAS
Low-power Mode
Row n
Low-power mode is used in power-down mode, i.e., when no access to the SDRAM device is
possible. In this mode, power consumption is greater than in self-refresh mode. This state is sim-
ilar to normal mode (No low-power mode/No self-refresh mode), but the SDCKE pin is low and
the input and output buffers are deactivated as soon as the SDRAM device is no longer accessi-
ble. In contrast to self-refresh mode, the SDRAM device cannot remain in low-power mode
longer than the refresh period (64 ms for a whole device refresh operation). As no auto-refresh
operations are performed in this mode, the SDRAM Controller carries out the refresh operation.
In order to exit low-power mode, a NOP command is required. The exit procedure is faster than
in self-refresh mode.
When self-refresh mode is enabled, it is recommended to avoid enabling low-power mode.
When low-power mode is enabled, it is recommended to avoid enabling self-refresh mode.
This is described in
T
RCD
= 3
col a
CAS = 2
Figure 23-8
col b
Dna
col c
below.
Dnb
col d
Dnc
col e
Dnd
col f
Dne
SAM7SE512/256/32
Dnf
Low Power Mode
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