SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 568

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SAM7SE256

Manufacturer Part Number
SAM7SE256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7SE256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 38-12. Stall Handshake (Data IN Transfer)
Figure 38-13. Stall Handshake (Data OUT Transfer)
568
SAM7SE512/256/32
USB Bus
Packets
FORCESTALL
STALLSENT
USB Bus
Packets
FORCESTALL
STALLSENT
When a setup transaction is received after a stall handshake, STALLSENT must be cleared in
order to prevent interrupts due to STALLSENT being set.
1. The microcontroller sets the FORCESTALL flag in the UDP_CSRx endpoint’s register.
2. The host receives the stall packet.
3. The microcontroller is notified that the device has sent the stall by polling the
STALLSENT to be set. An endpoint interrupt is pending while STALLSENT is set. The
microcontroller must clear STALLSENT to clear the interrupt.
Data OUT PID
Data IN
PID
Set by USB Device
Data OUT
Stall PID
Set by Firmware
Stall PID
Set by Firmware
Interrupt Pending
Interrupt Pending
Set by
USB Device
Cleared by Firmware
Cleared by Firmware
Cleared by Firmware
6222F–ATARM–14-Jan-11

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