SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 215

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SAM7SE256

Manufacturer Part Number
SAM7SE256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7SE256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
23.7.4
Name:
Access:
• SRCB: Self-refresh Command Bit
0: No effect.
1: The SDRAM Controller issues a self-refresh command to the SDRAM device, the SDCK clock is inactivated and the
SDCKE signal is set low. The SDRAM device leaves self-refresh mode when accessed again.
23.7.5
Name:
Access:
Reset Value:
• LPCB: Low-power Command Bit
0: The SDRAM Controller low-power feature is inhibited: no low-power command is issued to the SDRAM device.
1: The SDRAM Controller issues a low-power command to the SDRAM device after each burst access, the SDCKE signal
is set low. The SDRAM device will leave low-power mode when accessed and enter it after the access.
6222F–ATARM–14-Jan-11
31
23
15
31
23
15
7
7
SDRAMC Self-refresh Register
SDRAMC Low-power Register
30
22
14
30
22
14
SDRAMC_SRR
Write-only
6
SDRAMC_LPR
Read/Write
0x0
6
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
27
19
11
27
19
11
3
3
26
18
10
26
18
10
2
2
SAM7SE512/256/32
25
17
25
17
9
1
9
1
SRCB
LPCB
24
16
24
16
8
0
8
0
215

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