SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 59

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SAM7SE256

Manufacturer Part Number
SAM7SE256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7SE256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Figure 13-5. User Reset State
13.2.4.3
6222F–ATARM–14-Jan-11
periph_nreset
proc_nreset
Brownout Reset
(nrst_out)
RSTTYP
NRST
SLCK
NRST
MCK
When the brown_out/bod_reset signal is asserted, the Reset State Manager immediately enters
the Brownout Reset. In this state, the processor, the peripheral and the external reset lines are
asserted.
The Brownout Reset is left 3 Slow Clock cycles after the rising edge of brown_out/bod_reset
after a two-cycle resynchronization. An external reset is also triggered.
When the processor reset is released, the field RSTTYP in RSTC_SR is loaded with the value
0x5, thus indicating that the last reset is a Brownout Reset.
Resynch.
2 cycles
Any
Freq.
Any
>= EXTERNAL RESET LENGTH
Resynch.
2 cycles
XXX
Processor Startup
= 3 cycles
SAM7SE512/256/32
0x4 = User Reset
59

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