SAM7SE256 Atmel Corporation, SAM7SE256 Datasheet - Page 213

• Manufacturer Part Number: SAM7SE256
• Manufacturer: Atmel Corporation

Specifications of SAM7SE256

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 48 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 88
• Ext Interrupts: 88
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

23.7.3
Name:
Access:
Reset Value:
• NC: Number of Column Bits
Reset value is 8 column bits.
• NR: Number of Row Bits
Reset value is 11 row bits.
• NB: Number of Banks
Reset value is two banks.
• CAS: CAS Latency
Reset value is two cycles.
In the SDRAMC, only a CAS latency of two cycles is managed. In any case, another value must be programmed.
6222F–ATARM–14-Jan-11
0
0
1
1
TRAS
TWR
TRP
31
23
15
0
0
1
1
–
7
NR
NB
0
1
SDRAMC Configuration Register
NC
0
1
0
1
30
22
14
0
1
0
1
SDRAMC_CR
Read/Write
0x2A99C140
6
Number of Banks
Row Bits
Reserved
CAS
11
12
13
Column Bits
2
4
10
11
8
9
29
21
13
5
TRCD
TXSR
TRC
NB
28
20
12
4
27
19
11
3
NR
26
18
10
2
SAM7SE512/256/32
TRAS
TWR
TRP
25
17
9
1
NC
24
16
8
0
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