MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 101

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

B.3.4 MCCI Interrupt Vector Register
Register address: $XXXX05
B.3.5 SPI Interrupt Level Register
Register address: $XXXX06
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Reset:
Reset:
Read:
Write:
Read:
Write:
Bit 15
Bit 15
0
0
0
= Unimplemented
14
14
0
0
0
ILSCI (SCI interrupt level register)
13
13
0
0
Figure B-3. MCCI Interrupt Vector Register (MIVR)
Figure B-4. SPI Interrupt Level Register (ILSPI)
ILSPI
INTV[7:2] — Interrupt Vector [7:2] Bits
INTV[1:0] — Interrupt Vector [1:0] Bits
ILSPI — Interrupt Level for SPI Bit
12
12
0
0
High-order six bits of MCCI interrupt vector programmed by user.
Writes to INTV0 and INTV1 have no meaning or effect. Reads of
INTV0 and INTV1 return a value of 1.
ILSPI determines the priority level of SPI interrupts. Program this field
to a value from $0 (interrupts disabled) through $7 (highest priority).
Freescale Semiconductor, Inc.
For More Information On This Product,
11
00 = SCIA is source of interrupt.
01 = SCIB is source of interrupt.
10 = SPI is source of interrupt.
11
0
0
10
10
0
0
0
Memory Map and Registers
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9
0
9
0
0
8
0
8
0
0
7
0
7
6
0
6
INTV[7:2]
5
0
5
Reserved
4
0
4
Memory Map and Registers
3
1
3
Reference Manual
2
1
2
INTV[1:0}
1
1
1
Bit 0
Bit 0
1
101