MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 51

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MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
4.12 SPI Registers
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
After correcting the problems that led to the mode fault, clear MODF by
reading the SPSR while MODF is set and then writing to the SPCR.
Control bits SPE and MSTR may be restored to their original set state
during this clearing sequence or after the MODF bit has been cleared.
Hardware does not allow the user to set the SPE and MSTR bits while
MODF is a logic 1 except during the proper clearing sequence.
SPI registers are shown in
offsets from the MCCI base address.
Software can read and write the SPCR and SPDR. Software can read
the SPSR, but only the SPI hardware can write to this register. The
SPCR must be initialized before the SPI is enabled to ensure defined
operation. Reset values are shown at the bottom of each register
diagram.
Freescale Semiconductor, Inc.
For More Information On This Product,
Address
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SPI Submodule
Table 4-4. SPI Registers
Name
SPCR
SPSR
SPDR
Table
4-4. The addresses indicated are
SPI control register
SPI status register
SPI data register
Reserved
Usage
Reference Manual
SPI Submodule
SPI Registers
51

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