MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 36

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MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Configuration and Control
3.7.2 MCCI Pin Assignment Register
Reference Manual
36
Register address: $XXXX09
Reset:
Read:
Write:
Bit 15
14
13
Figure 3-6. MCCI Pin Assignment Register (MPAR)
The MCCI pin assignment register (MPAR) determines which of the SPI
pins (with the exception of the SCK pin) actually are used by the SPI
submodule and which pins are available for general-purpose I/O. (The
state of SCK is determined by the SPI enable bit in SPCR1.) Pins may
be assigned to the SPI or to function as general-purpose I/O on a
pin-by-pin basis. SPI pins designated by the MPAR as general-purpose
I/O are controlled only by MDDR and PORTMC; the SPI has no effect on
these pins. The MPAR does not affect the operation of the SCI
submodule.
MPAR[7:4] and MPAR2 — Not implemented
SS — Slave Select Bit
MOSI — Master Out/Slave In Bit
MISO — Master In/Slave Out Bit
12
Reserved
These bits determine whether the associated MCCI port pin functions
as a general-purpose I/O pin or is assigned to the SPI submodule.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = General-purpose I/O
1 = SPI function
11
10
Go to: www.freescale.com
Configuration and Control
9
8
7
0
0
Multichannel Communication Interface — Rev. 1.0
6
0
0
5
0
0
4
0
0
SS
3
0
2
0
0
MOTOROLA
MOSI MISO
1
0
Bit 0
0

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